I want you to change the code and make it your own make sure that code is change same goes to the comments

I want you to change the code and make it your own make sure that code is change same goes to the comments

in this file I want you to change these files code 1. main.cpp , 2. level.cpp and level.hpp and 3. map.cpp and map.hpp also tlb.cpp and tlb.hpp and dont forget to update the makefile too

CS 480 OPERATING SYSTEMS
Assignment 03
Part II Programming (120 points)
Pair-programming up to two in a group, or work alone
Due: Beginning of the class, Mar 22nd
Demand Paging with Multilevel Page table and TLB
Demand Paging is a virtual memory management scheme that would only load and map
pages from persistent storage to memory when needed, i.e., when a process tries to
access a page that is not residing in the physical memory (which would result in a page
fault). The OS will then try to allocate the physical frame, load, and map the page to the
allocated physical frame as part of the page fault handling.
In this assignment, you will write a simulation of demand paging using a multi-level
page tree/table with address translation caching (Translation lookaside buffer – TLB).
A 32-bit virtual address space is assumed. The user will indicate how many bits are to be
used for each of the page table levels, the size of the TLB cache (max number of page
mappings in TLB cache), and a user-specified file containing hexadecimal addresses will
be used to simulate virtual/logical address accesses and construct a page table tree.
Functionality
Upon start, your program creates an empty page table (only the level 0 node should be
allocated). The program should read logical / virtual addresses one at a time from an
input trace file. The trace file consists of memory reference traces for simulating a series
of access attempts to logical / virtual addresses.
For each virtual/logical address read in, simulate the memory management unit (MMU)
for translating virtual address to physical address as well as the Operating System
demand paging process (See Figure 1 below):
1) Extract the full virtual page number (VPN), search the TLB then the page tree (in
the case of a TLB miss) to find the Virtual Page Number (VPN) → Physical
Frame Number (PFN) mapping information.
2) If the VPN → PFN mapping entry is found in TLB, use the found PFN for
translation.
3) If the VPN → PFN mapping entry is NOT found in TLB (TLB miss), walk the
page table tree:
a. if the mapping is found in the page table, insert the mapping to the TLB
cache; if the TLB is full, need to apply the cache replacement using the
approximation of the LRU (Least Recently Used) policy (see TLB
specification)
4)
5)
6)
7)
b. if the mapping is not in the page table, insert the page to the page
tree/table with an assigned frame index (starting at 0 and continue
sequentially) that simulates the demand paging allocation of a physical
frame to the virtual page brought into memory (important: you will
assume an infinite number of frames are available and need not worry
about a page replacement algorithm).
i. after the demanding paging brings in the page and inserts the VPN
→ PFN mapping to the page table, also inserts the mapping to the
TLB cache; if the TLB is full, need to apply the cache replacement
(again, see TLB specification).
In all cases described in 2) and 3), update or insert the recently accessed pages
which is used for cache replacement (must follow the TLB specification for
updating the recently accessed pages).
If the page mapping is found in the TLB cache, increment the cache hit counter;
if the page mapping is NOT found in the TLB (a TLB miss) and then the page
mapping is found in the page table, increment a page table hit counter.
Note: TLB cache hits + page table hits + page table misses = total number of
address accesses.
Print appropriate outputs to the standard output as specified below in “User
Interface”
Important – Allocating (assigning) a frame number (PFN) to a VPN:
You use a sequential number for the PFN starting from 0.
At the beginning, there is nothing mapped in the page table. You read in first
virtual address from the trace file, you extract the VPN information from that
virtual address and insert the VPN to the multi-level page table (using the multilevel numbers of bits from the command line).
At the leaf level / node, you would assign (i.e., map) the frame 0 to that first
VPN. Then increment the frame number to 1 to be assigned to the next VPN
inserted to the page table. And you do this process for each new VPN inserted to
the page table.
You are recommended to implement the multi-level paging without TLB first, then add
the TLB simulation. Many autograding tests are testing the multi-level paging without
TLB.
2|Page
User Interface
When invoked, your simulator should accept the following optional arguments and have
two or more mandatory arguments. Implementing this interface correctly is critical to
earning points. Several functions are provided to help you put output in the correct
format and are listed next to each of the output modes. These are located in
output_mode_helpers.c, which will compile in C or C++. The function to use for each
output mode is listed in parentheses after the mode explanation, see the function
comments in the source code for details.
Do NOT implement your own output functions, autograding is strictly dependent on the
output formats from the provided output functions.
Optional arguments:
-n N
Process only the first N memory accesses / references. Processes
all addresses if not present.
-c N
Cache capacity of the TLB, i.e., max number of page mapping
entries (N) in TLB. Default is 0 if not specified, meaning NO TLB
caching.
Important:
• If an out-of-range number (< 0) is specified, print to the standard error output (stderr): Cache capacity must be a number, greater than or equal to 0 then exit. -o mode output mode. Mode is a string that specifies what to be printed to the standard output: 3|Page bitmasks – Write out the bitmasks for each level starting with the highest level, one per line. In this mode, you do not need to actually process any addresses. Program prints bitmasks and exits. (Use report_bitmasks.) virtual2physical – Show virtual address translation to physical address for every address, one address translation per line. (Use report_virtual2physical.) v2p_tlb_pt - Show virtual to physical translation for every address, lookup TLB then pagetable walk if TLB misses, one address translation per line. (Use report_v2pUsingTLB_PTwalk.) vpn2pfn – For every virtual address, show its virtual page numbers for each level followed by the frame number, one address per line. (Use report_pagemap.) offset – Show offsets of virtual addresses, one address offset per line. (Use hexnum.) summary – Show summary statistics. This is the default argument if -o is not specified. (Use report_summary.) Statistics reported include the page size, number of addresses processed, hit and miss rates for tlb and pagetable walk, number of frames allocated, total bytes required for page table (hint: use sizeof). You should get a roughly accurate estimate of the total bytes used for the page table including data used in all page tree levels. Note your calculated number may not match the number of total bytes in sample_output.txt (should be close though), as you may not have strictly the same data members in your structures as in the solution code, which is fine. But you should be aware that in general, with more paging levels, less total bytes would normally be used. Mandatory arguments: • The first mandatory argument is the name of the trace file consisting of memory reference traces for simulating a series of attempts of accessing virtual / logical addresses. • trace.tr is given for your testing. • Auto-grading on gradescope will use all or part of trace.tr. • Appropriate error handling should be present if the file is not existent or cannot be opened. It must print to standard error output (stderr) the following error messages: Unable to open 4|Page • • The traces were collected from a Pentium II running Windows 2000 and are courtesy of the Brigham Young University Trace Distribution Center. The files tracereader.h and tracereader.c implement a small program to read and print trace files. You can include these files in your compilation and use the functionality to process the tracefile. The file trace.tr is a sample of the trace of an executing process. See an example of reading trace file in a3_programming_misctips.pdf. The remaining mandatory arguments are the number of bits to be used for each level, important: • number of bits for any level MUST be greater than or equal to 1; if not, print to the standard error output (stderr) with a line feed, e.g., level 0 has 0 bit specified, it should print: Level 0 page table must be at least 1 bit then exit. • total number of bits from all levels should be less than or equal to 28 (